C-PHY Driver Finite State Machine
C-PHY Driver Finite State Machine
Figure 1: C-PHY Driver’s finite state machine for HS data transmission
Initially the C-PHY Driver is in Tx_STOP state until upper protocol layer requests high speed data transmission. In this state, the C-PHY Driver transmits sequence of LP-111 indicating low power mode. On request of HS data transmission, the C-PHY Driver enters Tx-HS-Request state and starts transmission of LP-001 sequence for a pre-configured time interval TLPX. At the end of this time interval, the C-PHY Driver transfers to Tx-HS-Prepare state and starts transmitting LP-000 sequence for a pre-configured time interval THS-PREPARE. At the end of THS-PREPARE, the C-PHY Driver transfers to Tx-HS-Preample state and sends sequence of 3’s. After transmitting specific number of preample words, the C-PHY Driver transfers to Tx-HS-SYNC state for one TX Word clock cycle and sends the SYNC word “3444443”. Then the C-PHY Driver transfers to Tx-HS-Data state and transmits HS payload data words. At the end of HS data transmission, the C-PHY Driver transfers to TX-HS-POST transmits sequence of 4’s until LP-111 is detected on the lane wires then returns to Tx-STOP state.
All data received from protocol layer are synchronized to a TxHSWordClk which is 1/7 the data rate of transmitted bits over c-phy lane wires.Typical data rate is 1.5 Gb/sec.