It is the goal of CHDLogic to provide active leadership and support in developing and maintaining affordable Front-End Digital Logic Designs.

 

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MIPI D-PHY Rx De-Serializer

CHDLogic’s D-PHY De-Serializer is used in the Monitor side to de-serialize the output pf the RxDual-Edge FF into 8-bits data delivering one RxByteHS data to upper layer on RxByteClkHS edge. The following simulation wave-form shows the 8-bits deserialized data in both LP and HS modes.

 

Simulation Waveform