MIPI D-PHY Verification

CHDLogic’s D-PHY Monitor is functionally verified using icarus verilog simulation tool. Every module in both Driver and Monitor is tested alone. Then the modules are integrated together forming the MIPI D-PHY Driver model and MIPI D-PHY Monitor model. The MIPI D-PHY Driver model is connected to the MIPI D-PHY Monitor. The test bench reads the data bytes from an input file and feeds them to the Driver with Byte Clock rate 312.5 Mb/sec.

Then the test bench writes the output of the Monitor side in a file. Data in both input and output files are matched verifying the functionality of both Driver and Monitor sides.